1. Field of the Invention
This invention relates to a method and apparatus for recording data on a recording medium, a method and apparatus for reproducing data recorded on a recording medium and a method and apparatus for recording and/or reproducing data for a recording medium.
2. Description of Related Art
As a recording medium for recording digital data, there are known a wide variety of recording mediums of the magnetic, optical or photomagnetic system, such as a hard disc, a so-called DVCR (digital video cassette recorder) or a so-called CD (Compact Disc), DVD (digital versatile disc) and a so-called MO (magneto-optical disc).
For recording signals on these recording mediums, physical processing needs to be performed on the recording mediums, such as by controlling the direction of magnetization by a write head for a recording medium of the magnetic recording system, or by forming pits of lengths corresponding to signals by a stamper for a recording medium of the optical recording system. In this case, in order to permit amplitude control of readout signals or clock reproduction on the reproducing side reading out the signals recorded on the recording medium to operate as normally, the signal recording side for recording signals on a recording medium routinely uses a system of modulation encoding the signal in a pre-set manner to record the resulting modulation-coded signal.
A modulation-coder, performing this modulation coding, routinely is fed with binary signals exempt from various limitations, and outputs binary signals free of various limitations. These limitations on the signals include DC free limitations which state that the numbers of “0”s and “1”s be equalized over a sufficient long length of the concatenations of “0”s and “1”s, and the (d, k) limitations which state that the minimum and maximum numbers of consecutive “0”s and “1”s in a code be d and k, respectively. FIG. 1 shows an input/output example in a modulation coder outputting a code satisfying the (d, k)=(2, 7) limitations. Specifically, a modulation coder 150, outputting a code satisfying the (d, k)=(2, 7) limitation, is shown in FIG. 1, by way of concrete explanation of the concept of the (d, k) limitations. That is, if an input signal, free of the limitation, is input to the modulation coder 150, outputting a code satisfying the (d, k)=(2, 7) limitation, modulation-encodes the input signal to generate and output an output signal in which the minimum and maximum numbers of consecutive “0”s are 2 and 7, respectively.
The above example indicates that, in converting a bit string free of a limitation is converted into another bit string subjected to a limitation, the total number of the output bits is larger than that of the input bits. If the total number of input bits is K and the total number of output bits is N, the ratio K/N is represented as a code rate R. This code rate R serves as an index indicating the efficiency of the modulation coding. If two or more modulation coders, generating output signals satisfying the same limitations, are compared to one another, a modulation coder having the high code rate R is able to encode more input bits for a given number of output bits than one having the low code rate R. Stated differently, a modulation coder having a high code rate R is able to record more information on a pre-set recording medium than one having a low code rate R.
The modulation coding may be classified into a block coding system in which input bits are divided into plural blocks of pre-set lengths and output bits generated are divided into plural blocks of pre-set lengths corresponding to the blocks of the input bits, and a variable length coding system, in which encoding units of input bits and output bits associated with the input bits are varied. For example, the so-called 8/9 code or the 16/17 code, routinely used for modulation coding, belong to the block coding system, whilst the so-called (1, 7) RLL code or the (2, 7) RLL code belong to the variable length encoding system.
For example, in a block modulation encoding system, fed with two bits as input bits, and generating three output bits satisfying the (d, k)=(0, 2) limitations, a modulation coder has a conversion table as Table 1:
TABLE 1Example of Conversion Tableinput bitsoutput bits00011011011011111110stored in e.g., a memory, not shown. The modulation coder references this conversion table and finds, for each 2-bit input bits, an associated 3-bit output bits, with the output bits being issued as output sequentially.
On the other hand, a modulation decoder for modulating-decoding the modulation-coded signals has a back-conversion table, as Table 2:
TABLE 2Example of Back-Conversion Tableinput bitdecoded bits0000100100010100110010011101011101111110corresponding to the conversion table of Table 1, stored in e.g., a memory, not shown. The modulation decoder references this back-conversion table to find and sequentially output 2-bit decoded bits, associated with the 3-bit input bits.
FIG. 2 shows a typical modulation decoder 160 having at least a ROM (read-only memory) 161. The modulation decoder 160 is fed with an input address signal D161 to output the contents stored in an address of the ROM 161 corresponding to this input address signal D161 as a demodulated decoded signal D162. In actuality, if the input bits are back-converted into decoded bits in accordance with the back-conversion table shown in Table 2, the contents of the decoded bits are stored in addresses of a ROM 161 of the modulation decoder 160, corresponding to the input bits in Table 2. The decoded bits, stored in these addresses, are read out by way of performing the back-conversion.
FIG. 3 shows a typical modulation decoder 170 at least having a combination circuit 171. The modulation decoder 170 is fed with an input signal D171 and executes logical operations on the input signal D171 by the combination circuit 171 to generate a modulated decoded signal D172. In actuality, if, in performing back conversion from the input bits to the decoded bits in accordance with the back-conversion table of Table 2, the three-bit input signal D171 is represented as (a0, a1, a2) and a two-bit modulated decoded signal D172 is represented as (b0, b1), the modulation decoder 170 generates the output bits (b0, b1) by the combination circuit 171 corresponding to the following logical equations (1):b0=(a1&a2)|(a0&!a1&!a2)|(!a0&a1&!a2)b1=(a0&!a1)|(!a0&!a1&!a2)|(a0&a1&!a2)  (1)where |, & and ! indicate the logical sum, logical product and logical negation, respectively.
If the modulation coder and the modulation decoder are applied to a magnetic recording and/or reproducing apparatus for recording and/or reproducing data on or from a recording medium in accordance with the magnetic recording system, the recording and/or reproducing apparatus is configured as shown in FIG. 4.
That is, the magnetic recording and/or reproducing apparatus 200, shown in FIG. 4, includes, as a recording system for recording data on a recording medium 250, an error correction encoder 201 for error correction encoding input data, a modulation encoder 201, a modulation encoder 202 for modulation encoding the input data, a precoder 203 for filtering input data for compensating its channel characteristics, a write current driver 204 for converting respective bits of the input data into write current values, and a write head 205 for recording data on the recording medium 250. The magnetic recording and/or reproducing apparatus 200 also includes, as a playback system for reproducing data recorded on the recording medium 250, a readout head 206 for reading out data recording on the recording medium 250, an equalizer 207 for equalizing the input data, a gain adjustment circuit 208 for adjusting the gain of the input data, an analog/digital converter (A/D converter) 209 for converting analog data into digital data, a timing generating circuit 210 for generating clocks, a gain adjustment control circuit 211 for controlling the gain adjustment circuit 208, a viterbi decoder 212 for viterbi-decoding the input bits, a modulation decoder 213 for modulation decoding the input data and an error correction decoder 214 for error correction decoding the input data.
In recording data on the recording medium 250, the magnetic recording and/or reproducing apparatus 200 performs the following operations:
When fed with the input data D201 the magnetic recording and/or reproducing apparatus 200 applies error correction coding to the input data D201, by the error correction encoder 201, to generate error correction encoded data D202.
The magnetic recording and/or reproducing apparatus 200 modulation encodes the error correction encoded data D202 from the error correction encoder 201, by the modulation encoder 202, to generate modulation-encoded data D203, which is a string of bits subjected to limitations.
The magnetic recording and/or reproducing apparatus 200 performs filtering on the modulation-encoded data D203, supplied from the modulation encoder 202, by the precoder 203, in such a manner as to compensate for the channel characteristics as from the writing of data on the recording medium 250 up to outputting thereof at an equalizer 207 in the reproducing system, to generate a precode signal D204. For example, if the channel has 1−D characteristics, the precoder 203 performs the filtering F indicated by the following equation (2):F=1/(1⊕D)  (2)where ⊕ denotes exclusive-OR.
The magnetic recording and/or reproducing apparatus 200 then converts respective bits of the precode signal D204, as binary signal supplied from the precoder 203, by a write current driver 204, into write current values Is, such as by 0→−IS, 1→+IS, to generate a write current signal D205.
By the write head 205, the magnetic recording and/or reproducing apparatus 200 applies a magnetic write signal D206, corresponding to the write current signal D205 supplied from the write current driver 204, to the recording medium 250.
By the above processing, the magnetic recording and/or reproducing apparatus 200 is able to record data on the recording medium 250.
In reproducing the data recorded on the recording medium 250, the magnetic recording and/or reproducing apparatus 200 performs the following processing:
First, the magnetic recording and/or reproducing apparatus 200 reads out the. readout magnetization signal D207 from the recording medium 250 by the readout head 206 to generate a readout current signal D208 conforming to this readout magnetization signal D207.
The magnetic recording and/or reproducing apparatus 200 then equalizes the readout current signal D208, supplied from the readout head 206, by the equalizer 207, so that the channel response since data writing on the recording medium 250 in the recording system until outputting thereof at the equalizer 207 will be of pre-set characteristics, such as 1−D, to generate an equalized signal D209.
The magnetic recording and/or reproducing apparatus 200 then adjusts the gain of the equalized signal D209, supplied from the equalizer 207, by the gain adjustment circuit 208, based on a gain adjustment control signal D213 from the gain adjustment control circuit 211, to generate a gain adjustment signal D210. Meanwhile, the gain adjustment control signal D213 is generated by the gain adjustment control circuit 211, based on the digital channel signal D211, as later explained. Specifically, the gain adjustment control signal D213 is a control signal for maintaining the amplitude of the equalization signal D209 at an expected value.
By the A/D converter 209, the magnetic recording and/or reproducing apparatus 200 digitizes the gain adjustment signal D210, supplied from the gain adjustment circuit 208, to generate the digital channel signal D211. Meanwhile, the A/D converter 209 performs sampling based on the clock signal D212 generated and supplied by the timing generating circuit 210. The timing generating circuit 210, fed with the digital channel signal D211, generates clocks to produce clock signals D212 which are output to the A/D converter 209.
The magnetic recording and/or reproducing apparatus 200 feeds the digital channel signal D211, supplied from the A/D converter 209, to the viterbi decoder 212, which then performs viterbi decoding on the channel response from the upstream side of the precoder 203 in the recording system up to the outputting at the equalizer 207 in the reproducing system, for example, the channel response Rch represented by the following equation (3):Rch=(1−D)/(1⊕D)  (3)where ⊕ denotes Exclusive-OR.
The magnetic recording and/or reproducing apparatus 200 then applies modulation decoding on the viterbi decoded signal D214, supplied from the modulation decoder 213, to realize data correspondence reversed from that in the modulation encoder 202 in the recording system to generate a modulated decoded signal D215 which is an original input data string not subjected to limitations.
The magnetic recording and/or reproducing apparatus 200 decodes the error correction codes of the modulated decoded signal D215, supplied from the modulation decoder 213, by the error correction decoder 214, to generate output data D216.
By the above processing, the magnetic recording and/or reproducing apparatus 200 is able to reproduce the data recorded on the recording medium 250.
Meanwhile, in the above-described conventional magnetic recording and/or reproducing apparatus 200, the modulation decoder 213 has no more than the function of realizing the correspondence between binary signals reversed from that obtained on modulation encoding by the modulation encoder 202, while the signals in both the input and the output of the modulation decoder 213 needs to be binary signals, with the result that the signals on the downstream side of the viterbi decoder 212 are all binary signals.
In other words, it is necessary in the magnetic recording and/or reproducing apparatus 200 to generate binary signals on the upstream side of the modulation decoder 213 and to process the binary signals even on the downstream side of the modulation decoder 213.
Thus, in the magnetic recording and/or reproducing apparatus 200, in which bi-level binary signals need to be used, the information volume in the signal is diminished intentionally with the result that efficient decoding cannot be realized to deteriorate the decoding error rate.